Process Design Kit (PDK) is the interface between semiconductor design tools and the semiconductor manufacturing process. For each new process we need to bring up PDK. Initially PDK referred to a PCELL library supplied by a foundry. PDK’s eventually grown to include all design elements, docs etc related technology which ever necessary for IC design.
Contents of PDK: Manufacturing design rules, electrical design rules and DRC, LVS run set files to verify physical & electrical layout for various EDA tools. Schematic symbol libraries. Various kinds of simulation models. Parasitic extraction rules. Description of basic building blocks of the process and are expressed algorithmically as Parameterized cells (PCells). Call backs to execute, evaluate and update when changes to parameters. Schematic symbols, PCells and callbacks are linked via a Component Description Format (CDF). Layer map file & technology file for layout Editors.
Essence of iPDK: PDK’s were specific to EDA vendors, specific to foundry, tech node & process variant. With more number of tools & more number of processes it’s became a very difficult situation for qualifying PDK’s to all combinations. So Interoperable PDK Libraries Alliance (IPL) working with TSMC explored the possibility of interoperable PDK’s (iPDK), PDK that can supports different EDA tools.
Need of common database: To get iPDK it’s important to have a common data base for EDA companies. To interoperate without data conversion and loss of functionality in between any two different EDA tools. A standard database Open Access (OA) created by cadence and given to the Silicon Integration Initiative (Si2) for standards organization.
Need of common scripting language: PCell coding for iPDK, there is a necessary of interoperable scripting language. The OA standard features plug-ins for many of standard scripting languages like Tcl, C++ and Python. Ciranova created OA based Python PCells called PyCells.
Why Python? Python supports OOPs. Faster run times. PyCell code has fewer lines as compared to PCell code. It also supports features like abutment, stretch handles and DFM rules. Efficient PyCell debugging to shortening cycle times.
Contents of PDK: Manufacturing design rules, electrical design rules and DRC, LVS run set files to verify physical & electrical layout for various EDA tools. Schematic symbol libraries. Various kinds of simulation models. Parasitic extraction rules. Description of basic building blocks of the process and are expressed algorithmically as Parameterized cells (PCells). Call backs to execute, evaluate and update when changes to parameters. Schematic symbols, PCells and callbacks are linked via a Component Description Format (CDF). Layer map file & technology file for layout Editors.
Need of common database: To get iPDK it’s important to have a common data base for EDA companies. To interoperate without data conversion and loss of functionality in between any two different EDA tools. A standard database Open Access (OA) created by cadence and given to the Silicon Integration Initiative (Si2) for standards organization.
Need of common scripting language: PCell coding for iPDK, there is a necessary of interoperable scripting language. The OA standard features plug-ins for many of standard scripting languages like Tcl, C++ and Python. Ciranova created OA based Python PCells called PyCells.
Why Python? Python supports OOPs. Faster run times. PyCell code has fewer lines as compared to PCell code. It also supports features like abutment, stretch handles and DFM rules. Efficient PyCell debugging to shortening cycle times.
iPDK is seen as TSMC standard. But other foundries wont support it. They only support virtuoso PDK. Si2 has started a new effort to develop Open Process Design Kit (Open PDK). The goal of Open PDK is to define a set of open standards to allow a PDK to be portable across foundries and EDA tools.
